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CMOS Static RAM 16K (16K x 1-Bit)
IDT6167SA IDT6167LA
x
Features
High-speed (equal access and cycle time) - Military: 25/35/45/55/70/85/100ns (max.) - Commercial: 15/20/25ns (max.) Low power consumption Battery backup operation -- 2V data retention voltage (IDT6167LA only) Available in 20-pin CERDIP and Plastic DIP, and 20-pin SOJ Produced with advanced CMOS high-performance technology CMOS process virtually eliminates alpha particle soft-error rates Separate data input and output Military product compliant to MIL-STD-883, Class B high reliability CMOS technology. Access times as fast as 15ns are available. The circuit also offers a reduced power standby mode. When CS goes HIGH, the circuit will automatically go to, and remain in, a standby mode as long as CS remains HIGH. This capability provides significant system-level power and cooling savings. The low-power (LA) version also offers a battery backup data retention capability where the circuit typically consumes only 1W operating off a 2V battery. All inputs and the output of the IDT6167 are TTL-compatible and operate from a single 5V supply, thus simplifying system designs. The IDT6167 is packaged in a space-saving 20-pin, 300 mil Plastic DIP or CERDIP and a Plastic 20-pin providing high board-level packing densities. Military grade product is manufactured in compliance with the latest revision of MIL-STD-883, Class B, making it ideally suited to military temperature applications demanding the highest level of performance and reliability.
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Description
The lDT6167 is a 16,384-bit high-speed static RAM organized as 16K x 1. The part is fabricated using IDT's high-performance,
Functional Block Diagram
A0
VCC GND ADDRESS DECODE 16,384-BIT MEMORY ARRAY
A13
DIN
I/O CONTROL
DOUT
,
CS CONTROL LOGIC WE
2981 drw 01
FEBRUARY 2001
1
(c)2000 Integrated Device Technology, Inc. DSC-2981/08
IDT6167SA/LA CMOS Static RAM 16K (16K x 1-Bit)
Military and Commercial Temperature Ranges
Pin Configurations
A0 A1 A2 A3 A4 A5 A6 DOUT WE GND 1 2 3 4 5 6 7 8 9 10 P20-1 D20-1 20 19 18 17 16 15 14 13 12 11 VCC A13 A12 A11 A10 A9 A8 A7 DIN CS
2981 drw 02
Absolute Maximum Ratings(1)
Symbol VTERM Rating Terminal Voltage with Respect to GND Operating Temperature Temperature Under Bias Storage Temperature Power Dissipation DC Output Current Com'l. -0.5 to +7.0 Mil. -0.5 to +7.0 Unit V
TA TBIAS TSTG PT
0 to +70 -55 to +125 -55 to +125 1.0 50
-55 to +125 -65 to +135 -65 to +150 1.0 50
o
C C C
o
o
W mA
2981 tbl 03
,
IOUT
DIP Top View Pin Descriptions
Name A0 - A13 CS WE VCC DIN DOUT GND
NOTE: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
Description Address Inputs Chip Select Write Enable Power DATAIN DATAOUT Ground
2981 tbl 01
Capacitance (TA = +25C, f = 1.0MHz)
Symbol CIN COUT Parameter(1) Input Capacitance Output Capacitance Conditions VIN = 0V VOUT = 0V Max. 7 7 Unit pF pF
2981 tbl 04
NOTE: 1. This parameter is determined by device characterization, but is not production tested.
Truth Table(1)
Mode Standby Read Write CS H L L WE X H L Output High-Z DATAOUT High-Z Power Standby Active Active
2981 tbl 02
Recommended DC Operating Conditions
Symbol VCC GND VIH VIL Parameter Supply Voltage Ground Input High Voltage Input Low Voltage Min. 4.5 0 2.2 -0.5
(1)
Typ. 5.0 0
____
Max. 5.5 0 6.0 0.8
Unit V V V V
2981 tbl 05
NOTE: 1. H = VIH, L = VIL, X = Don't Care.
____
Recommended Operating Temperature and Supply Voltage
Grade Military Commercial Temperature -55OC to +125OC 0OC to +70OC GND 0V 0V Vcc 5V 10% 5V 10%
2981 tbl 06
NOTE: 1. VIL (min.) = -3.0V for pulse width less than 20ns, once per cycle.
2
IDT6167SA/LA CMOS Static RAM 16K (16K x 1-Bit)
Military and Commercial Temperature Ranges
DC Electrical Characteristics(1)
(VCC = 5.0V 10%, VLC = 0.2V, VHC = VCC 0.2V)
6167SA/LA15 Symbol ICC1 Parameter Operating Power Supply Current CS < VIL, Outputs Open VCC = Max., f = 0(3) Dynamic Operating Current CS < VIL, Outputs Open VCC = Max., f = fMAX(3) Standby Power Supply Current (TTL Level) CS > VIH, Outputs Open VCC = Max., f = fMAX(3) Full Standby Power Supply Current (CMOS Level) CS > VHC, VCC = Max., VIN > VHC or VIN < VLC, f = 0(3) Power SA LA SA LA SA LA SA LA Com'l. 90 55 120 100 50 35 5 0.9 6167SA/LA20 Com'l. 90 55 100 80 35 30 5 0.05 6167SA/LA25 Com'l. 90 55 100 70 35 25 5 0.05 Mil. 90 60 100 75 35 25 10 0.9
2981 tbl 07
Unit mA
ICC2
mA
ISB
mA
ISB1
mA
DC Electrical Characteristics(1) (con't.)
(VCC = 5.0V 10%, VLC = 0.2V, VHC = VCC 0.2V)
6167SA/LA35(2) Symbol ICC1 Parameter Operating Power Supply Current CS < VIL, Outputs Open VCC = Max., f = 0(3) Dynamic Operating Current CS < VIL, Outputs Open VCC = Max., f = fMAX(3) Standby Power Supply Current (TTL Level) CS > VIH, Outputs Open VCC = Max., f = fMAX(3) Full Standby Power Supply Current (CMOS Level) CS > VHC, VCC = Max., VIN > VHC or VIN < VLC, f = 0(3) Power SA LA SA LA SA LA SA LA Mil. 90 60 100 70 35 20 10 0.9 6167SA/LA45(2) Mil. 90 60 100 65 35 20 10 0.9 6167SA/LA55(2) Mil. 90 60 100 60 35 20 10 0.9 6167SA/LA70(2) Mil. 90 60 100 60 35 15 10 0.9
2981 tbl 08
Unit mA
ICC2
mA
ISB
mA
ISB1
mA
NOTES: 1. All values are maximum guaranteed values. 2. -55C to +125C temperature range only. Also available; 85ns and 100ns Military devices. 3. fMAX = 1/tRC, only address inputs cycling at fMAX. f = 0 means no address inputs change.
6.42 3
IDT6167SA/LA CMOS Static RAM 16K (16K x 1-Bit)
Military and Commercial Temperature Ranges
DC Electrical Characteristics
(VCC = 5.0V 10%)
Symbol |ILI| |ILO| VOL VOH IDT6167SA Parameter Input Leakage Current Output Leakage Current Output Low Voltage Output High Voltage Test Conditions VCC = Max., VIN = GND to VCC VCC = Max., CS = VIH, VOUT = GND to VCC IOL = 8mA, VCC = Min. IOH = -4mA, VCC = Min. MIL. COM'L. MIL. COM'L. Min.
____ ____ ____ ____ ____
IDT6167LA Min.
____ ____ ____ ____ ____
Max. 10 5 10 5 0.4
____
Max. 5 2 5 2 0.4
____
Unit A A V V
2981 tbl 09
2.4
2.4
Data Retention Characteristics Over All Temperature Ranges
(LA Version Only) (VLC = 0.2V, VHC = VCC 0.2V)
Typ.(1) VCC @ Symbol VDR ICCDR tCDR Parameter VCC for Data Retention Data Retention Current Chip Deselect to Data Retention Time Operation Recovery Time Input Leakage Current Test Condition
____
Max. VCC @ 3.0V
____
Min. 2.0
2.0V
____
2.0V
____
3.0V
____
Unit V A ns
MIL. COM'L. CS > VHC VIN > VHC or < VLC
____ ____
0.5 0.5
____
1.0 1.0
____
200 20
____
300 30
____
0 tRC(2)
____
tR(3)
____
____
____
____
ns A
2981 tbl 10
IILII(3)
____
____
2
2
NOTES: 1. TA = +25C. 2. tRC = Read Cycle Time. 3. This parameter is guaranteed by device characterization, but is not production tested.
Low VCC Data Retention Waveform
DATA RETENTION MODE VCC 4.5V VDR 2V tCDR CS VDR tR 4.5V
VIH
VIH
2981 drw 03
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4
IDT6167SA/LA CMOS Static RAM 16K (16K x 1-Bit)
Military and Commercial Temperature Ranges
AC Test Conditions
Input Pulse Levels Input Rise/Fall Times Input Timing Reference Levels Output Reference Levels AC Test Load
5V
GND to 3.0V 5ns 1.5V 1.5V See Figures 1 and 2
2981 tbl 11
5V
480 DATAOUT 255 30pF*
480 DATAOUT 255 5pF*
,
2981 drw 04
,
2981 drw 05
Figure 1. AC Test Load *Includes scope and jig.
Figure 2. AC Test Load (for tCLZ, tCHZ, tWHZ and tOW)
AC Electrical Characteristics
Symbol Parameter
(VCC = 5.0V 10%, All Temperature Ranges)
6167SA15(3) Min. Max. 6167SA20(3)/25 6167LA20(3)/25 Min. Max. 6167SA35(1)/45(1) 6167LA35(1)/45(1) Min. Max. 6167SA55(1)/70(1) 6167LA55(1) /70(1) Min. Max. Unit
Read Cycle
tRC tAA tACS tCLZ(2) tCHZ(2) tOH tPU tPD
(2) (2)
Read Cycle Time Address Access Time Chip Select Access Time Chip De select to Output in Low-Z Chip Select to Output in High-Z Output Hold from Address Change Chip Select to Power-Up Time Chip Deselect to Power-Down Time
15
____
____
20/25
____
____
35/45
____
____
55/70
____
____
ns ns ns ns ns ns ns ns
15 15
____
20/25 20/25
____
35/45 35/45
____
55/70 55/70
____
____
____
____
____
3
____
5/5
____
5/5
____
5/5
____
10
____
10/10
____
15/30
____
40/40
____
3 0
____
5/5 0/0
____
5/5 0/0
____
5/5 0/0
____
____
____
____
____
15
20/25
35/45
55/70
Write Cycle
tWC tCW tAW tAS tWP tWR tDW tDH tWHZ(2) tOW(2) Write Cycle Time Chip Select to End-of-Write Address Valid to End-of-Write Address Set-up Time Write Pulse Width Write Recovery Time Data Valid to End-of-Write Data Hold Time Write Enable to Output in High-Z Output Active from End-of-Write 15 15 15 0 13 0 10 0
____ ____
20/20 15/20 15/20 0/0 15/20 0/0 12/15 0/0
____
____
30/45 30/40 30/40 0/0 30/30 0/0 17/20 0/0
____
____
55/70 45/55 45/55 0/0 35/40 0/0 25/30 0/0
____
____
ns ns ns ns ns ns ns ns ns ns
2981 tbl 12
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
7
____
8/8
____
15/30
____
40/40
____
0
0/0
0/0
0/0
NOTES: 1. -55C to +125C temperature range only. Also available: 85ns and 100ns Military devices. 2. This parameter is guaranteed with AC Load (Figure 2) by device characterization, but is not production tested. 3. 0C to +70C temperature range only.
6.42 5
IDT6167SA/LA CMOS Static RAM 16K (16K x 1-Bit)
Military and Commercial Temperature Ranges
Timing Waveform of Read Cycle No. 1(1, 2)
tRC
ADDRESS tAA tOH PREVIOUS DATAOUT VALID DATAOUT VALID
2981 drw 06
DATAOUT
,
Timing Waveform of Read Cycle No. 2(1, 3)
tRC
CS tACS tCLZ DATAOUT HIGH IMPEDANCE DATAOUT VALID tPU ICC VCC SUPPLY CURRENT ISB
2981 drw 07
tCHZ
(4)
(4)
HIGH IMPEDANCE
tPD
,
NOTES: 1. WE is HIGH for Read cycle. 2. Device is continuously selected, CS is LOW. 3. Address valid prior to or coincedent with CS transition LOW. 4. Transition is measured 200mV from steady state.
6
IDT6167SA/LA CMOS Static RAM 16K (16K x 1-Bit)
Military and Commercial Temperature Ranges
Timing Waveform of Write Cycle No. 1 (WE Controlled Timing)(1,3)
tWC ADDRESS
tAW
CS
(2)
tAS
tWP
tWR
tCHZ
(4)
WE
tWHZ
(4)
tOW
(5)
(4)
DATAOUT
PREVIOUS DATAOUT VALID
DATAOUT VALID (5) tDW tDH
DATAIN
DATAIN VALID
2981 drw 08
,
Timing Waveform of Write Cycle No. 2 (CS Controlled Timing)(1,3)
tWC ADDRESS tAW CS tAS WE tDW DATAIN DATAIN VALID
2981 drw 09
tCW
tWR t (2)
tDH
,
NOTES: 1. A write occurs during the overlap of a LOW CS and a LOW WE. 2. tWR is measured from the earlier of CS or WE going HIGH to the end of the write cycle. 3. If the CS low transition occurs simultaneously with or after the WE LOW transition, the outputs remain in the high-impedance state. 4. Transition is measured 200mV from steady state. 5. During this period, the I/O pins are in the output state and the input signals must not be applied.
6.42 7
IDT6167SA/LA CMOS Static RAM 16K (16K x 1-Bit)
Military and Commercial Temperature Ranges
Ordering Information -- Military
IDT 6167 Device Type XX Power XXX Speed XX Package X Process/ Temperature Range
B
Military (-55C to +125C) Compliant to MIL-STD-883, Class B
D
300 mil CERDIP (D20-1)
25 35 45 55 70 85 100
Speed in nanoseconds
SA LA
Standard Power Low Power
2981 drw 10
Ordering Information -- Commerical
IDT 6167 Device Type XX Power XXX Speed XX Package X Process/ Temperature Range
Blank
Commercial (0C to +70C)
P
300 mil Plastic DIP (P20- 1)
15* 20 25
Speed in nanoseconds
SA LA
Standard Power Low Power
* A vailable in standard pow er only. 2981 drw 10A
8
IDT6167SA/LA CMOS Static RAM 16K (16K x 1-Bit)
Military and Commercial Temperature Ranges
Datasheet Document History
1/13/2000 Pg. 7 Pg. 8 Pg. 1-3, 5, 8 Pg. 1, 2, 8 Pg. 9 Updated to new format Removed Note 1 from Write Cycle No. 1 and No. 2 drawings; renumbered notes and footnotes Added Datasheet Document History Removed speed offering 15ns and 20ns for military and 35ns for commercial temperature range. Removed SOJ package offering. Updated Datasheet History Not recommended for new designs Removed "Not recommended for new designs"
1/26/2000
08/09/00 02/01/01
CORPORATE HEADQUARTERS 2975 Stender Way Santa Clara, CA 95054
for SALES: 800-345-7015 or 408-727-6116 fax:408-492-8674 www.idt.com
6.42 9
for Tech Support: sramhelp@idt.com 800 544-7726, x4033
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